Verification techniques for system-level design
by
 
Fujita, Masahiro, 1956-

Title
: 
Verification techniques for system-level design

Author
: 
Fujita, Masahiro, 1956-

Personal Author
: 
Fujita, Masahiro, 1956-

Publication Information
: 
Amsterdam ; Boston : Morgan Kaufmann Publishers, c2008.

Physical Description
: 
viii, 240 p. : ill.

Series
: 
The Morgan Kaufmann series in systems on silicon
 
Morgan Kaufmann series in systems on silicon.

Subject Term
: 
Systems on a chip -- Testing.
 
Integrated circuits -- Verification.
 
Formal methods (Computer science)

Genre
: 
Electronic books.

Added Author
: 
Ghosh, Indradeep, 1970-
 
Prasad, Mukul.

Added Corporate Author
: 
ProQuest (Firm)

Electronic Access
: 
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Shelf NumberItem BarcodeShelf LocationShelf LocationHolding Information
TK7895 .E42 F95 2008943156-1001Ebook CentralEbook Central