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      Cover image for Wafer-level testing and test during burn-in for integrated circuits
      1. 
      Wafer-level testing and test during burn-in for integrated circuits
      by 
      Bahukudumbi, Sudarshan.
      Click to View
      Format: 
      Excerpt: 
      Chakrabarty, Krishnendu.
      Cover image for Testing of Interposer-Based 2.5D Integrated Circuits
      2. 
      Testing of Interposer-Based 2.5D Integrated Circuits
      by 
      Wang, Ran. author.
      http://dx.doi.org/10.1007/978-3-319-54714-5
      Format: 
      Excerpt: 
      Chakrabarty, Krishnendu. author.
      Cover image for Algorithms for sample preparation with microfluidic lab-on-chip
      3. 
      Algorithms for sample preparation with microfluidic lab-on-chip
      by 
      Bhattacharjee, Sukanta, author.
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      Format: 
      Excerpt: 
      Chakrabarty, Krishnendu, author.
      Cover image for Adaptive cooling of integrated circuits using digital microfluidics
      4. 
      Adaptive cooling of integrated circuits using digital microfluidics
      by 
      Paik, Philip Y.
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      Format: 
      Excerpt: 
      Chakrabarty, Krishnendu.
      Cover image for Computer-Aided Design of Microfluidic Very Large Scale Integration (mVLSI) Biochips Design Automation, Testing, and Design-for-Testability
      5. 
      Cover image for Knowledge-Driven Board-Level Functional Fault Diagnosis
      6. 
      Knowledge-Driven Board-Level Functional Fault Diagnosis
      by 
      Ye, Fangming. author.
      http://dx.doi.org/10.1007/978-3-319-40210-9
      Format: 
      Excerpt: 
      Chakrabarty, Krishnendu. author.
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