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      Cover image for System-level modelling and design space exploration for multiprocessor embedded system-on-chip architectures
      1. 
      System-level modelling and design space exploration for multiprocessor embedded system-on-chip architectures
      by 
      Erbaş, Çağkan.
      Click to View
      Format: 
      Excerpt: 
      Systems on a chip -- Design and construction.
      Cover image for Designer's guide to the Cypress PSoC
      2. 
      Designer's guide to the Cypress PSoC
      by 
      Ashby, Robert.
      Click to View
      Format: 
      Excerpt: 
      Systems on a chip -- Design and construction.
      Cover image for ESL design and verification a prescription for electronic system-level methodology
      3. 
      ESL design and verification a prescription for electronic system-level methodology
      by 
      Bailey, Brian, 1959-
      Click to View
      Format: 
      Excerpt: 
      Systems on a chip -- Design and construction.
      Cover image for ESL design and verification : a prescription for electronic system-level methodology
      4. 
      ESL design and verification : a prescription for electronic system-level methodology
      by 
      Bailey, Brian, 1959-
      ScienceDirect https://www.sciencedirect.com/science/book/9780123735515
      Format: 
      Excerpt: 
      Systems on a chip -- Design and construction.
      Cover image for Designer's guide to the Cypress PSoC
      5. 
      Designer's guide to the Cypress PSoC
      by 
      Ashby, Robert.
      ScienceDirect https://www.sciencedirect.com/science/book/9780750677806
      Format: 
      Excerpt: 
      Systems on a chip -- Design and construction.
      Cover image for Multiprocessor systems on chips
      6. 
      Multiprocessor systems on chips
      by 
      Wolf, Wayne.
      ScienceDirect http://www.sciencedirect.com/science/book/9780123852519
      Format: 
      Excerpt: 
      Systems on a chip -- Design and construction.
      Cover image for Metamodeling-driven IP reuse for SoC integration and microprocessor design
      7. 
      Metamodeling-driven IP reuse for SoC integration and microprocessor design
      by 
      Mathaikutty, Deepak A.
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      Format: 
      Excerpt: 
      Systems on a chip -- Design and construction.
      Cover image for Designing SOCs with configured cores unleashing the Tensilica Xtensa and diamond cores
      8. 
      Designing SOCs with configured cores unleashing the Tensilica Xtensa and diamond cores
      by 
      Leibson, Steve.
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      Format: 
      Excerpt: 
      Systems on a chip -- Design and construction.
      Cover image for Modeling embedded systems and SoC's : concurrency and time in models of computation
      9. 
      Modeling embedded systems and SoC's : concurrency and time in models of computation
      by 
      Jantsch, Axel.
      ScienceDirect https://www.sciencedirect.com/science/book/9781558609259
      Format: 
      Excerpt: 
      Systems on a chip -- Design and construction -- Data processing.
      Cover image for Designing SOCs with configured cores : unleashing the Tensilica Xtensa and diamond cores
      10. 
      Designing SOCs with configured cores : unleashing the Tensilica Xtensa and diamond cores
      by 
      Leibson, Steve.
      ScienceDirect https://www.sciencedirect.com/science/book/9780123724984
      Format: 
      Excerpt: 
      Systems on a chip -- Design and construction.