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Three-dimensional integrated circuit design
Title:
Three-dimensional integrated circuit design
Author:
Pavlidis, Vasilis F., 1976-
ISBN:
9780123743435
9780080921860
Personal Author:
Publication Information:
Amsterdam ; Boston : Morgan Kaufmann, ©2009.
Physical Description:
1 online resource (xv, 309 pages) : illustrations.
Series:
The Morgan Kaufmann series in systems on silicon
Morgan Kaufmann series in systems on silicon.
Contents:
Chapter 1. Introduction -- Chapter 2. Manufacturing of 3-D Packaged Systems -- Chapter 3. 3-D Integrated Circuit Fabrication Technologies -- Chapter 4. Interconnect Prediction Models -- Chapter 5. Physical Design Techniques for 3-D ICs -- Chapter 6. Thermal Management Techniques -- Chapter 7. Timing Optimization for Two-Terminal Interconnects -- Chapter 8. Timing Optimization for Multi-Terminal Interconnects -- Appendix A: Enumeration of Gate Pairs in a 3-D IC --Appendix B: Formal Proof of Optimum Single Via Placement -- Appendix C: Proof of the Two-Terminal Via Placement Heuristic -- Appendix D: Proof of Condition for Via Placement of Multi-Terminal Nets -- References.
Abstract:
With vastly increased complexity and functionality in the "nanometer era" (i.e. hundreds of millions of transistors on one chip), increasing the performance of integrated circuits has become a challenging task. This is due primarily to the inevitable increase in the distance among circuit elements and interconnect design solutions have become the greatest determining factor in overall performance.
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Electronic Access:
ScienceDirect http://www.sciencedirect.com/science/book/9780123743435Available:*
Shelf Number | Item Barcode | Shelf Location | Status |
|---|---|---|---|
| TK7874 .P39 2009 | 1191813-1001 | Elsevier E-Book Collections | Searching... |
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