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      Cover image for An FPGA-based Hardware Accelerator for Iris Segmentation
      1. 
      An FPGA-based Hardware Accelerator for Iris Segmentation
      by 
      Avey, Joseph, author.
      http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqm&rft_dat=xri:pqdiss:10788771
      Format: 
      Excerpt: 
      -performance computers is a challenge. Solutions have been proposed to target mobile platforms like smart phones and
      Cover image for Computer organization and design : the hardware/software interface
      2. 
      Computer organization and design : the hardware/software interface
      by 
      Hennessy, John L.
      ScienceDirect https://www.sciencedirect.com/science/book/9781483207759
      Format: 
      Excerpt: 
      -- Parallel processors -- Appendices. Assemblers, linkers and the SPIM simulator / James R. Larus ; The basics
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