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      Cover image for More-than-Moore 2.5D and 3D SiP Integration
      1. 
      More-than-Moore 2.5D and 3D SiP Integration
      by 
      Radojcic, Riko. author.
      http://dx.doi.org/10.1007/978-3-319-52548-8
      Format: 
      Excerpt: 
      Processor Architectures.
      Cover image for Fundamentals of Electronic Systems Design
      2. 
      Fundamentals of Electronic Systems Design
      by 
      Lienig, Jens. author.
      http://dx.doi.org/10.1007/978-3-319-55840-0
      Format: 
      Excerpt: 
      Processor Architectures.
      Cover image for Internet of Things Building Blocks and Business Models
      3. 
      Internet of Things Building Blocks and Business Models
      by 
      Hussain, Fatima. author.
      http://dx.doi.org/10.1007/978-3-319-55405-1
      Format: 
      Excerpt: 
      Processor Architectures.
      Cover image for Handbook of Hardware/Software Codesign
      4. 
      Handbook of Hardware/Software Codesign
      by 
      Ha, Soonhoi. editor.
      http://dx.doi.org/10.1007/978-94-017-7267-9
      Format: 
      Excerpt: 
      Processor Architectures.
      Cover image for Fuzzy Logic Based Power-Efficient Real-Time Multi-Core System
      5. 
      Fuzzy Logic Based Power-Efficient Real-Time Multi-Core System
      by 
      Ahmed, Jameel. author.
      http://dx.doi.org/10.1007/978-981-10-3120-5
      Format: 
      Excerpt: 
      Processor Architectures.
      Cover image for Automatic Methods for the Refinement of System Models From the Specification to the Implementation
      6. 
      Cover image for Designing with Xilinx® FPGAs Using Vivado
      7. 
      Designing with Xilinx® FPGAs Using Vivado
      by 
      Churiwala, Sanjay. editor.
      http://dx.doi.org/10.1007/978-3-319-42438-5
      Format: 
      Excerpt: 
      Processor Architectures.
      Cover image for New Data Structures and Algorithms for Logic Synthesis and Verification
      8. 
      New Data Structures and Algorithms for Logic Synthesis and Verification
      by 
      Amaru, Luca Gaetano. author.
      http://dx.doi.org/10.1007/978-3-319-43174-1
      Format: 
      Excerpt: 
      Processor Architectures.
      Cover image for Embedded Systems Design with Special Arithmetic and Number Systems
      9. 
      Embedded Systems Design with Special Arithmetic and Number Systems
      by 
      Molahosseini, Amir Sabbagh. editor.
      http://dx.doi.org/10.1007/978-3-319-49742-6
      Format: 
      Excerpt: 
      Processor Architectures.
      Cover image for Fundamentals of IP and SoC Security Design, Verification, and Debug
      10. 
      Cover image for Foundations of Hardware IP Protection
      11. 
      Foundations of Hardware IP Protection
      by 
      Bossuet, Lilian. editor.
      http://dx.doi.org/10.1007/978-3-319-50380-6
      Format: 
      Excerpt: 
      Processor Architectures.
      Cover image for Parallel Sparse Direct Solver for Integrated Circuit Simulation
      12. 
      Parallel Sparse Direct Solver for Integrated Circuit Simulation
      by 
      Chen, Xiaoming. author.
      http://dx.doi.org/10.1007/978-3-319-53429-9
      Format: 
      Excerpt: 
      Processor Architectures.
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