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      Cover image for Next Generation Spin Torque Memories
      1. 
      Next Generation Spin Torque Memories
      by 
      Kaushik, Brajesh Kumar. author.
      http://dx.doi.org/10.1007/978-981-10-2720-8
      Format: 
      Excerpt: 
      and discusses the outlook for this cutting-edge technology. It also describes the architectures
      Cover image for Foundations of Hardware IP Protection
      2. 
      Foundations of Hardware IP Protection
      by 
      Bossuet, Lilian. editor.
      http://dx.doi.org/10.1007/978-3-319-50380-6
      Format: 
      Excerpt: 
      in Area of Block Ciphers -- Enhancing Secure Elements – Technology and Architecture.
      Cover image for Nanometer CMOS ICs From Basics to ASICs
      3. 
      Nanometer CMOS ICs From Basics to ASICs
      by 
      J.M. Veendrick, Harry. author.
      http://dx.doi.org/10.1007/978-3-319-47597-4
      Format: 
      Excerpt: 
      disciplines of nanometer CMOS ICs, including physics, lithography, technology, design, memories, VLSI, power
      Cover image for 3D Microelectronic Packaging From Fundamentals to Applications
      4. 
      3D Microelectronic Packaging From Fundamentals to Applications
      by 
      Li, Yan. editor.
      http://dx.doi.org/10.1007/978-3-319-44586-1
      Format: 
      Excerpt: 
      analysis Discusses 3D electronic package architecture and assembly process design Features contributions