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      Cover image for Microprocessor architectures : RISC, CISC, and DSP
      1. 
      Microprocessor architectures : RISC, CISC, and DSP
      by 
      Heath, Steve.
      ScienceDirect http://www.sciencedirect.com/science/book/9780750623032
      Format: 
      Excerpt: 
      'Why are there all these different processor architectures and what do they all mean? Which
      Cover image for Microprocessor architectures and systems : RISC, CISC, and DSP
      2. 
      Microprocessor architectures and systems : RISC, CISC, and DSP
      by 
      Heath, Steve, author.
      ScienceDirect https://www.sciencedirect.com/science/book/9780750600323
      Format: 
      Excerpt: 
      ; System integrity; Requirements for a new processor architecture; Software compatibility; Enter the MC
      Cover image for Algorithms and parallel VLSI architectures III : proceedings of the International Workshop, Algorithms and Parallel VLSI Architectures III, Leuven, Belgium, August 29-31, 1994
      3. 
      Algorithms and parallel VLSI architectures III : proceedings of the International Workshop, Algorithms and Parallel VLSI Architectures III, Leuven, Belgium, August 29-31, 1994
      by 
      International Workshop on Algorithms and Parallel VLSI Architectures (3rd : 1994 : Louvain, Belgium)
      ScienceDirect http://www.sciencedirect.com/science/book/9780444821065
      Format: 
      Excerpt: 
      -- Chapter 17. Instruction-level parallelism in asynchronous processor architectures -- Chapter 18. High