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      Cover image for Silicon carbide junction field effect transistor integrated circuits for hostile environments
      1. 
      Cover image for Design of Coarse-grained Power Gating for a Fine-grained Many-core Processor Array
      2. 
      Design of Coarse-grained Power Gating for a Fine-grained Many-core Processor Array
      by 
      Umapathy, Shylesh, author.
      http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqm&rft_dat=xri:pqdiss:10823057
      Format: 
      Excerpt: 
      high-speed, low-power integrated circuits. In modern semiconductor manufacturing, leakage power in high
      Cover image for Tunneling Transistors from 2D Crystals for Low-Power Electronic Applications
      3. 
      Tunneling Transistors from 2D Crystals for Low-Power Electronic Applications
      by 
      Prakash, Abhijith, author.
      http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqm&rft_dat=xri:pqdiss:10790845
      Format: 
      Excerpt: 
      transistor technologies had forced the semiconductor industry to resort to complementary metal oxide
      Cover image for A Study on Unintentional and Intentional Sources of Variability in Nanometer Scale Digital Circuits
      4. 
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