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Bhunia, Swarup. editor.
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2017
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      Cover image for From Variability Tolerance to Approximate Computing in Parallel Integrated Architectures and Accelerators
      13. 
      Cover image for Computer-Aided Design of Microfluidic Very Large Scale Integration (mVLSI) Biochips Design Automation, Testing, and Design-for-Testability
      14. 
      Cover image for Embedded Software Verification and Debugging
      15. 
      Embedded Software Verification and Debugging
      by 
      Lettnin, Djones. editor.
      http://dx.doi.org/10.1007/978-1-4614-2266-2
      Format: 
      Excerpt: 
      Processor Architectures.
      Cover image for Analog Integrated Circuit Design Automation Placement, Routing and Parasitic Extraction Techniques
      16. 
      Cover image for Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects
      17. 
      Cover image for Formal Verification of Simulink/Stateflow Diagrams A Deductive Approach
      18. 
      Cover image for RFID Security A Lightweight Paradigm
      19. 
      RFID Security A Lightweight Paradigm
      by 
      Khattab, Ahmed. author.
      http://dx.doi.org/10.1007/978-3-319-47545-5
      Format: 
      Excerpt: 
      Processor Architectures.
      Cover image for Electromigration Inside Logic Cells Modeling, Analyzing and Mitigating Signal Electromigration in NanoCMOS
      20. 
      Cover image for Hardware Protection through Obfuscation
      21. 
      Hardware Protection through Obfuscation
      by 
      Forte, Domenic. editor.
      http://dx.doi.org/10.1007/978-3-319-49019-9
      Format: 
      Excerpt: 
      Processor Architectures.
      Cover image for Hardware IP Security and Trust
      22. 
      Hardware IP Security and Trust
      by 
      Mishra, Prabhat. editor.
      http://dx.doi.org/10.1007/978-3-319-49025-0
      Format: 
      Excerpt: 
      Processor Architectures.
      Cover image for Computing Platforms for Software-Defined Radio
      23. 
      Computing Platforms for Software-Defined Radio
      by 
      Hussain, Waqar. editor.
      http://dx.doi.org/10.1007/978-3-319-49679-5
      Format: 
      Excerpt: 
      Processor Architectures.
      Cover image for Neuro-inspired Computing Using Resistive Synaptic Devices
      24. 
      Neuro-inspired Computing Using Resistive Synaptic Devices
      by 
      Yu, Shimeng. editor.
      http://dx.doi.org/10.1007/978-3-319-54313-0
      Format: 
      Excerpt: 
      Processor Architectures.
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