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2017
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      Cover image for Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects
      1. 
      Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects
      by 
      Lourenço, Nuno. author.
      http://dx.doi.org/10.1007/978-3-319-42037-0
      Format: 
      Excerpt: 
      approaches. The authors describe a methodology for an automatic flow for analog IC design, including details
      Cover image for Emerging Technology and Architecture for Big-data Analytics
      2. 
      Emerging Technology and Architecture for Big-data Analytics
      by 
      Chattopadhyay, Anupam. editor.
      http://dx.doi.org/10.1007/978-3-319-54840-1
      Format: 
      Excerpt: 
      Java Virtual Machine on a Many-core System -- Chapter 2.Scaling the Java Virtual Machine on a Many