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California State University, Fresno. Electrical and Computer Engineering. degree granting institution.

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University of California, Los Angeles. Materials Science and Engineering 0328. degree granting institution.

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University of Minnesota. Electrical Engineering. degree granting institution.

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Aljafar, Muayad Jaafar, author.

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Bai, Siqi, author.

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Brito, Nuno Andre Mano, author.

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Cakir, Burcin, author.

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Colorado State University. Electrical and Computer Engineering. degree granting institution.

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Dartmouth College. Engineering. degree granting institution.

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Dave, Abhilasha Harsukhbhai, author.

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Dou, Wei, author.

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Fatima, Fnu, author.

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Gentry, Cale Michael, author.

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Hong Kong University of Science and Technology (Hong Kong). degree granting institution.

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Jackson, David L., author.

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Koyily, Anoop, author.

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Krishna Prasad, Aditi, author.

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Liu, Dong, author.

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Michigan Technological University. Electrical & Computer Engineering. degree granting institution.

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Missouri University of Science and Technology. Electrical Engineering. degree granting institution.

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Ng, Jimmy, author.

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Portland State University. Electrical and Computer Engineering. degree granting institution.

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Portland State University. Physics. degree granting institution.

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Princeton University. Electrical Engineering. degree granting institution.

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Purdue University. Electrical and Computer Engineering. degree granting institution.

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Rengstl, Ulrich, author.

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Sengupta, Deepashree, author.

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Takhti, Mohammad, author.

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Tang, Qianying, author.

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The University of Manchester (United Kingdom). Department of Computer Science. degree granting institution.

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The University of Manchester (United Kingdom). Department of Electrical Engineering. degree granting institution.

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The University of North Dakota. Physics. degree granting institution.

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Umapathy, Shylesh, author.

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Universidade do Minho (Portugal). degree granting institution.

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Universitaet Stuttgart (Germany). degree granting institution.

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University of Arkansas. Electrical Engineering. degree granting institution.

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University of California, Los Angeles. Electrical Engineering. degree granting institution.

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University of Minnesota. Electrical/Computer Engineering. degree granting institution.

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University of Newcastle Upon Tyne (United Kingdom). degree granting institution.

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Viera de Melo, Ana Cristina, author.

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Wang, Isaac Caleb, author.

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Wong, Chien-Heng, author.

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Wood, Neal Graham, author.

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Cover image for Silicon carbide junction field effect transistor integrated circuits for hostile environments

Silicon carbide junction field effect transistor integrated circuits for hostile environments

1.

Silicon carbide junction field effect transistor integrated circuits for hostile environments

by

Wood, Neal Graham, author.

http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqm&rft_dat=xri:pqdiss:13874215

Format:

Excerpt:

Silicon carbide junction field effect transistor integrated circuits for hostile environments /

Cover image for Design and Characterization Techniques for Reliable and Secure Integrated Circuits

Design and Characterization Techniques for Reliable and Secure Integrated Circuits

2.

Design and Characterization Techniques for Reliable and Secure Integrated Circuits

by

Tang, Qianying, author.

http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqm&rft_dat=xri:pqdiss:10255960

Format:

Excerpt:

Design and Characterization Techniques for Reliable and Secure Integrated Circuits / Tang, Qianying

Cover image for Iii-v semiconductor photonic integrated circuits with quantum dots as single-photon emitters

Iii-v semiconductor photonic integrated circuits with quantum dots as single-photon emitters

3.

Iii-v semiconductor photonic integrated circuits with quantum dots as single-photon emitters

by

Rengstl, Ulrich, author.

http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqm&rft_dat=xri:pqdiss:10869062

Format:

Excerpt:

Iii-v semiconductor photonic integrated circuits with quantum dots as single-photon emitters /

Cover image for Fast Very-large-scale Integrated (VLSI) Circuits Simulations

Fast Very-large-scale Integrated (VLSI) Circuits Simulations

4.

Fast Very-large-scale Integrated (VLSI) Circuits Simulations

by

Zhao, Xueqian, author.

http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqm&rft_dat=xri:pqdiss:10791659

Format:

Excerpt:

Fast Very-large-scale Integrated (VLSI) Circuits Simulations / Zhao, Xueqian, author.

Cover image for Clock Jitter in Communication Systems

Clock Jitter in Communication Systems

5.

Clock Jitter in Communication Systems

by

Martwick, Andrew Wayne, author.

http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqm&rft_dat=xri:pqdiss:10812172

Format:

Excerpt:

data transfer between integrated circuits. Clock jitter is a noise source in a communication link

Cover image for A Novel Power Integrity Modeling Method Based on Plane Pair PEEC

A Novel Power Integrity Modeling Method Based on Plane Pair PEEC

6.

A Novel Power Integrity Modeling Method Based on Plane Pair PEEC

by

Bai, Siqi, author.

http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqm&rft_dat=xri:pqdiss:10744238

Format:

Excerpt:

circuits. A novel modeling mothed, i.e. the plane pair PEEC method is proposed in this thesis to model the

Cover image for Addressing Integrated Circuit Integrity Using Statistical Analysis and Machine Learning Techniques

Addressing Integrated Circuit Integrity Using Statistical Analysis and Machine Learning Techniques

7.

Addressing Integrated Circuit Integrity Using Statistical Analysis and Machine Learning Techniques

by

Cakir, Burcin, author.

http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqm&rft_dat=xri:pqdiss:10824059

Format:

Excerpt:

Outsourcing of design and manufacturing processes makes integrated circuits (ICs) vulnerable to

Cover image for Application of Machine Learning in Digital Logic Circuit Design Verification and Testing

Application of Machine Learning in Digital Logic Circuit Design Verification and Testing

8.

Application of Machine Learning in Digital Logic Circuit Design Verification and Testing

by

Dave, Abhilasha Harsukhbhai, author.

http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqm&rft_dat=xri:pqdiss:10824322

Format:

Excerpt:

operations of the circuit. To simulate the circuits for the structural testing several Electronic Design

Cover image for Scalable Quantum Light Sources in Silicon Photonic Circuits

Scalable Quantum Light Sources in Silicon Photonic Circuits

9.

Scalable Quantum Light Sources in Silicon Photonic Circuits

by

Gentry, Cale Michael, author.

http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqm&rft_dat=xri:pqdiss:10791965

Format:

Excerpt:

Chip-scale integrated photonic circuits provide an attractive platform for the implementation of

Cover image for DPLL and Energy Harvesting Circuit for Low-Power and Miniaturized System Applications

DPLL and Energy Harvesting Circuit for Low-Power and Miniaturized System Applications

10.

DPLL and Energy Harvesting Circuit for Low-Power and Miniaturized System Applications

by

Wong, Chien-Heng, author.

http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqm&rft_dat=xri:pqdiss:10827411

Format:

Excerpt:

introduces a fully integrated CMOS dual source adaptive thermoelectric and RF energy harvesting circuit with

Cover image for Accurate Dimension Reduction Based Polynomial Chaos Approach for Uncertainty Quantification of High Speed Networks

Accurate Dimension Reduction Based Polynomial Chaos Approach for Uncertainty Quantification of High Speed Networks

11.

Accurate Dimension Reduction Based Polynomial Chaos Approach for Uncertainty Quantification of High Speed Networks

by

Krishna Prasad, Aditi, author.

http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqm&rft_dat=xri:pqdiss:10785345

Format:

Excerpt:

-level behavior of integrated circuits. As a result, there is a need for contemporary circuit simulation tools

Cover image for Design of Coarse-grained Power Gating for a Fine-grained Many-core Processor Array

Design of Coarse-grained Power Gating for a Fine-grained Many-core Processor Array

12.

Design of Coarse-grained Power Gating for a Fine-grained Many-core Processor Array

by

Umapathy, Shylesh, author.

http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqm&rft_dat=xri:pqdiss:10823057

Format:

Excerpt:

high-speed, low-power integrated circuits. In modern semiconductor manufacturing, leakage power in high

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