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Princeton University. Electrical Engineering. degree granting institution.

(3)

Purdue University. Electrical and Computer Engineering. degree granting institution.

(3)

Washington State University. Electrical Engineering. degree granting institution.

(3)

Abdelaziz, Jabril, author.

(1)

Ailijiang, Ailidani, author.

(1)

Atahary, Tanvir, author.

(1)

Brito, Nuno Andre Mano, author.

(1)

California State University, Fresno. Electrical and Computer Engineering. degree granting institution.

(1)

Carrell, Sylvia T., author.

(1)

Chen, Tao, author.

(1)

Chittamuru, Sai Vineel Reddy, author.

(1)

Choi, Wonje, author.

(1)

Colorado State University. Electrical and Computer Engineering. degree granting institution.

(1)

Cornell University. Electrical & Computer Engrng. degree granting institution.

(1)

Cornell University. Electrical and Computer Engineering. degree granting institution.

(1)

Das, Sourav, author. (orcid)0000-0002-7404-8133

(1)

Dave, Abhilasha Harsukhbhai, author.

(1)

Ferraiuolo, Andrew, author.

(1)

George Mason University. Electrical and Computer Engineering. degree granting institution.

(1)

Ham, Tae Jun, author.

(1)

Hamdan, Muhammad K.A., author.

(1)

Hentrich, David, author.

(1)

Hu, Yang, author.

(1)

Huai, Jianzhu, author.

(1)

Illinois Institute of Technology. Electrical and Computer Engineering. degree granting institution.

(1)

Iowa State University. Electrical and Computer Engineering. degree granting institution.

(1)

Jadhav, Shrikant Shridhar, author.

(1)

Jardine, P. Travis, author.

(1)

Kao, Tzyy-Juin, author.

(1)

Lee, Chris S., author.

(1)

Li, Ji, author.

(1)

Li, Xian, author.

(1)

Liu, Feng, author.

(1)

Liu, Xiaoyu, author.

(1)

Malik, Maria, author. (orcid)0000-0001-8425-2501

(1)

Nitin, Nitin, author.

(1)

North Carolina Agricultural and Technical State University. Electrical Engineering. degree granting institution.

(1)

Oh, Yeonju, author.

(1)

Pal, Asmita, author.

(1)

Purdue University. Computer and Information Technology. degree granting institution.

(1)

Queen's University (Canada). degree granting institution.

(1)

State University of New York at Buffalo. Computer Science and Engineering. degree granting institution.

(1)

The Ohio State University. Civil Engineering. degree granting institution.

(1)

The Pennsylvania State University. Computer Science and Engineering. degree granting institution.

(1)

The University of Arizona. Electrical and Computer Engineering. degree granting institution.

(1)

Universidade do Minho (Portugal). degree granting institution.

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Universite du Quebec a Chicoutimi (Canada). Informatique et mathématique. degree granting institution.

(1)

University of Dayton. Electrical Engineering. degree granting institution.

(1)

University of Florida. Electrical and Computer Engineering. degree granting institution.

(1)

University of Southern California. Electrical Engineering. degree granting institution.

(1)

Utah State University. Computer Engineering. degree granting institution.

(1)

Zhou, Yanqi, author.

(1)

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Strongly Consistent Coordination for Wide Area Networks için kapak resmi

Strongly Consistent Coordination for Wide Area Networks

13.

Strongly Consistent Coordination for Wide Area Networks

by

Ailijiang, Ailidani, author.

http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqm&rft_dat=xri:pqdiss:10823735

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coordination over wide area networks by utilizing (1) efficient architecture, (2) locality-awareness algorithms

Static and Dynamic Instruction Mapping for Spatial Architectures için kapak resmi

Static and Dynamic Instruction Mapping for Spatial Architectures

14.

Static and Dynamic Instruction Mapping for Spatial Architectures

by

Liu, Feng, author.

http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqm&rft_dat=xri:pqdiss:10808915

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The second technique, Dynamic Spatial Architecture Mapping (DYNASPAM), reuses the speculation

Design of Photonic Network-on-Chip Architectures Using Multilevel Signaling and Link Allocation Pareto-Optimization için kapak resmi

Design of Photonic Network-on-Chip Architectures Using Multilevel Signaling and Link Allocation Pareto-Optimization

15.

Design of Photonic Network-on-Chip Architectures Using Multilevel Signaling and Link Allocation Pareto-Optimization

by

Kao, Tzyy-Juin, author.

http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqm&rft_dat=xri:pqdiss:10746817

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automate architecture design in the future.

A reinforcement learning approach to predictive control design: Autonomous vehicle applications için kapak resmi

A reinforcement learning approach to predictive control design: Autonomous vehicle applications

16.

A reinforcement learning approach to predictive control design: Autonomous vehicle applications

by

Jardine, P. Travis, author.

http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqm&rft_dat=xri:pqdiss:10857294

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results demonstrate that the combined FOS-FALA architecture reduces the overall number of design

Machine Learning-inspired High-performance and Energy-efficient Heterogeneous Manycore Chip Design için kapak resmi

Machine Learning-inspired High-performance and Energy-efficient Heterogeneous Manycore Chip Design

17.

Machine Learning-inspired High-performance and Energy-efficient Heterogeneous Manycore Chip Design

by

Choi, Wonje, author.

http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqm&rft_dat=xri:pqdiss:10746308

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requirements. The on-chip communication architecture for heterogeneous manycore systems should be designed such

Towards Energy Efficient and Reliable 3D Manycore Chip Enabled by Machine Learning için kapak resmi

Towards Energy Efficient and Reliable 3D Manycore Chip Enabled by Machine Learning

18.

Towards Energy Efficient and Reliable 3D Manycore Chip Enabled by Machine Learning

by

Das, Sourav, author. (orcid)0000-0002-7404-8133

http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqm&rft_dat=xri:pqdiss:10784159

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-hop communications. In this context, we propose the design of 3D small-world NoC (3D SWNoC) architecture to overcome

Network-on-chip Enabled Manycore Architectures for Cyber-physical System için kapak resmi

Network-on-chip Enabled Manycore Architectures for Cyber-physical System

19.

Network-on-chip Enabled Manycore Architectures for Cyber-physical System

by

Li, Xian, author.

http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqm&rft_dat=xri:pqdiss:10785265

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compute-intensive applications. The performance of a manycore architecture is highly dependent on the

Timing-Safe Hardware-Level Information Flow Control için kapak resmi

Timing-Safe Hardware-Level Information Flow Control

20.

Timing-Safe Hardware-Level Information Flow Control

by

Ferraiuolo, Andrew, author.

http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqm&rft_dat=xri:pqdiss:10817347

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architecture, ARM TrustZone. A novel architecture for information flow security called HyperFlow is presented

Architectural Frameworks for Automated Design and Optimization of Hardware Accelerators için kapak resmi

Architectural Frameworks for Automated Design and Optimization of Hardware Accelerators

21.

Architectural Frameworks for Automated Design and Optimization of Hardware Accelerators

by

Chen, Tao, author.

http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqm&rft_dat=xri:pqdiss:10817553

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parallelism, and includes a flexible architecture that supports dynamic scheduling to enable mapping a wide

Improving Efficiency to Advance Resilient Computing için kapak resmi

Improving Efficiency to Advance Resilient Computing

22.

Improving Efficiency to Advance Resilient Computing

by

Li, Ji, author.

http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqm&rft_dat=xri:pqdiss:10746494

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compactness. Unlike traditional binary computing systems, SC-based DCNN architecture is resilient to radiation

Hardware and Software Accelerators for Big Data Machine Learning Workloads için kapak resmi

Hardware and Software Accelerators for Big Data Machine Learning Workloads

23.

Hardware and Software Accelerators for Big Data Machine Learning Workloads

by

Nitin, Nitin, author.

http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqm&rft_dat=xri:pqdiss:10272218

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these characteristics, I propose Millipede: a row-oriented PNM architecture which (pre)fetches and

Embedded real-time processor for MEMS applications için kapak resmi

Embedded real-time processor for MEMS applications

24.

Embedded real-time processor for MEMS applications

by

Brito, Nuno Andre Mano, author.

http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqm&rft_dat=xri:pqdiss:10758446

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and control systems development by proposing a flexible digital architecture for real-time control and

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