Search Results for Optimization.

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Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects

Lourenço, Nuno. author.

http://dx.doi.org/10.1007/978-3-319-42037-0

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Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects

New Data Structures and Algorithms for Logic Synthesis and Verification

Amaru, Luca Gaetano. author.

http://dx.doi.org/10.1007/978-3-319-43174-1

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and optimization tasks by taking advantage of majority and biconditional logic primitives. Readers

Computer-Aided Design of Microfluidic Very Large Scale Integration (mVLSI) Biochips Design Automation, Testing, and Design-for-Testability

Hu, Kai. author.

http://dx.doi.org/10.1007/978-3-319-56255-1

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Introduction -- Control-Layer Optimization -- Wash Optimization for Cross-Contamination Removal

Analog Integrated Circuit Design Automation Placement, Routing and Parasitic Extraction Techniques

Martins, Ricardo. author.

http://dx.doi.org/10.1007/978-3-319-34060-9

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and an optimization-based Placer), a fully-automatic Router and an empirical-based Parasitic Extractor

Computing Platforms for Software-Defined Radio

Hussain, Waqar. editor.

http://dx.doi.org/10.1007/978-3-319-49679-5

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processing algorithms on single and multicore platforms; Enables deep understanding of optimization

Testing of Interposer-Based 2.5D Integrated Circuits

Wang, Ran. author.

http://dx.doi.org/10.1007/978-3-319-54714-5

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Scheduling and Optimization -- A Programmable Method for Low-Power Scan Shift in SoC Dies -- Conclusions.-.

Emerging Technology and Architecture for Big-data Analytics

Chattopadhyay, Anupam. editor.

http://dx.doi.org/10.1007/978-3-319-54840-1

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Number System Multipliers -- Chapter 7. Ultra-Low-Power Biomedical Circuit Design and Optimization

The Dark Side of Silicon Energy Efficient Computing in the Dark Silicon Era

Rahmani, Amir M. editor.

http://dx.doi.org/10.1007/978-3-319-31596-6

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and Reliability Optimization of NoCs -- NoC-aware Computational Sprinting.-.

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